Why You Cannot ISP a UFS Phone and What to Do Instead

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ISP (In-System Programming) is the workhorse of eMMC-era data recovery: solder three or four fine wires to test points, hold the CPU in reset, and read the memory chip directly as if it were a card in a reader. Technicians routinely expect the same trick to work on newer phones — but almost every phone shipped since roughly 2018 stores its data on UFS (Universal Flash Storage), and UFS does not behave like eMMC on the bench. This article explains why the classic "clamp a few wires and read" ISP workflow does not translate to UFS, what the physics actually prevent, and which methods do work instead.

The short answer

You cannot ISP a UFS device the way you ISP an eMMC device because UFS is not a slow, single-ended, forgiving parallel bus — it is a high-speed differential serial link (MIPI M-PHY physical layer under the UniPro transport stack) that requires link training, a reference clock, and impedance-controlled routing before a single byte moves. There is no low-speed 1-bit fallback mode you can drop into, and hand-soldered ISP wires destroy the signal integrity that multi-gigabit-per-second differential pairs depend on. In practice the reliable ways to read a UFS device are in-circuit through the SoC (e.g. Qualcomm EDL/Firehose) or chip-off into a dedicated UFS BGA reader. And critically: on a modern encrypted phone, even a perfect physical dump is ciphertext — the readout method is rarely the thing standing between you and the data.

Background

ISP means talking to a phone's storage IC while it is still soldered to the board, using its native memory-bus test points, usually with the main application processor held in reset so it does not fight you for the bus. ISP became popular because it is faster and lower-risk than chip-off: no BGA rework, no reballing, no heat stress on a fragile board.

ISP is easy on eMMC because of what eMMC is. eMMC (JEDEC e·MMC) exposes a simple, single-ended bus:

CLK — clock
CMD — command line
DAT0–DAT7 — data lines (you can read in slow 1-bit mode using just DAT0)
VCC (core NAND supply, ~2.8–3.3 V), VCCQ (I/O supply, ~1.8 V), GND, and usually RST

That means the minimum viable ISP connection is roughly CLK, CMD, DAT0, VCCQ, VCC and GND. The bus is single-ended, tolerant of modest wire length, and — crucially — has a slow, low-frequency mode. An eMMC device will happily clock down and talk over messy soldered leads. This is why eMMC ISP "just works" across a huge range of boards.

UFS was designed to replace eMMC precisely because that parallel, half-duplex bus ran out of headroom. UFS moved to a serial, full-duplex, differential architecture borrowed from the MIPI Alliance stack. It is faster and more power-efficient — and, for the recovery technician, fundamentally harder to tap.

How it works

To see why ISP breaks, compare the two interfaces at the physical layer.

An eMMC device is an embedded controller plus NAND behind a simple synchronous parallel bus. You drive it with single-ended CMOS signaling. Worst case, you fall back to 1-bit, low-clock HS mode and read slowly but reliably. The controller state machine is simple and forgiving of imperfect wiring.

A UFS device is also an embedded controller plus NAND — but it sits behind a layered communication stack:

M-PHY — the MIPI physical layer. Data travels on differential pairs (a TX± pair and an RX± pair per lane, one or two lanes), at HS-GEAR rates measured in gigabits per second. There is also a low-speed PWM mode, but even that is differential and still requires the full link to come up.
UniPro — the unified protocol transport layer that runs on top of M-PHY, handling framing, flow control, and error recovery in hardware.
UFS command layer — SCSI-architecture command set (UFS Command Set / UPIU) riding on UniPro.

Reading UFS therefore requires you to bring up and train the M-PHY link and negotiate the UniPro connection before any command is accepted. That needs:

A real UFS host controller (a passive clamp cannot speak M-PHY/UniPro — you are not addressing raw memory, you are negotiating a link).
A reference clock (commonly 19.2 MHz) supplied to the device.
Correct reset and power sequencing (VCC core, VCCQ I/O ~1.8 V, VCCQ2 where present, GND).
Impedance-controlled, length-matched, short differential routing so the pairs actually resolve at gigabit rates.

Every one of those is hostile to ISP. Hand-soldered wires are unmatched, unshielded, and far too long for multi-gigabit differential signaling; the pairs pick up noise, skew, and reflections that the link-training simply fails on. And unlike eMMC, there is no single-ended slow mode to retreat to — the slowest UFS mode is still a differential link that must train up. This is the core reason the eMMC "three wires and a prayer" method has no UFS equivalent.

Property	eMMC (ISP-friendly)	UFS (ISP-hostile)
Signaling	Single-ended CMOS	Differential (M-PHY pairs)
Topology	Parallel bus (CLK/CMD/DAT)	Serial lanes (TX±, RX±)
Speed floor	Slow 1-bit HS mode available	Still a trained differential link
Handshake	Simple synchronous bus	M-PHY training + UniPro bring-up
Extra requirements	Power + ground	Reference clock, reset sequencing, matched routing
Tolerant of messy wiring?	Largely yes	No

You will see boxes and vendors advertise "UFS ISP" or "UFS test points." Read that carefully and vendor-skeptically: what usually makes those workflows succeed is not tapping the raw UFS bus over long wires, but reaching the storage through the SoC (via test points that trigger a boot/download mode) or reading the desoldered chip in a proper socket. The eMMC-style live-bus tap is not the mechanism.

What this means in practice

For UFS phones, the realistic readout paths are:

1. In-circuit through the SoC (preferred when available). Instead of tapping the UFS bus, you use the chipset's low-level boot/download mode, which itself owns the UFS host controller and does the M-PHY/UniPro work for you.

Qualcomm: Emergency Download (EDL) mode runs the Sahara protocol to accept an OEM-signed Firehose programmer, which then reads/writes UFS over USB. Community tooling like Template:Code and Template:Code drives this. The practical blocker is usually obtaining a valid signed Firehose loader for that exact model; on modern devices EDL is locked down and loaders are not freely available.
MediaTek and others: analogous BROM/download-mode loaders exist (e.g. Template:Code), with the same signed-loader and lockdown caveats.
Test points on the board are typically used to force the SoC into that download mode, not to tap UFS directly.

2. Chip-off into a UFS reader. Desolder the UFS BGA, reball if needed, and read it in a dedicated UFS socket/programmer. This is the closest true analogue to eMMC recovery, but it is harder than eMMC chip-off: UFS reader support is narrower, the BGA is delicate, and you must match the reader to the device's UFS generation and pinout. See Chip-Off Recovery and BGA Reballing Basics.

3. Software/exploit-level extraction. On supported models, forensic suites and community exploits pull a filesystem or physical image through the running SoC without any soldering at all — often the least invasive option when the device boots.

Whichever path you take, do not hand-solder to the UFS differential pairs expecting an eMMC-style read. At best you get nothing; at worst you damage the pads on an otherwise recoverable board.

What is and isn't recoverable

This is where honesty matters more than technique. On a modern UFS Android phone, getting the bytes off the chip is the easy part — decrypting them is the wall.

Since Android 10, File-Based Encryption (FBE) is mandatory. Files are encrypted with keys that are themselves wrapped by a Key Encryption Key derived from the user credential (PIN/password/pattern) and bound to hardware — Keymaster/StrongBox in the TEE or a discrete secure element. Any raw dump you pull via chip-off, EDL, or (hypothetically) ISP is ciphertext unless those keys are available.

The device's lock state decides almost everything:

BFU (Before First Unlock) — powered on but never unlocked since boot. The credential-derived keys are not resident in memory. A physical dump is largely opaque; very little user data is decryptable. Much post-reset/BFU data is permanently unrecoverable without the passcode.
AFU (After First Unlock) — unlocked at least once since boot. Many class keys are live in RAM, so substantially more can be extracted — but this depends on the device staying powered and on tool support, and it is not the physical-dump-plus-offline-decrypt workflow people imagine.

Scenario	Realistic outcome
Physically dumping a UFS chip (chip-off / EDL)	Yes — you get an image of the storage
That image on a BFU FBE device, no passcode	Mostly ciphertext; user data effectively unrecoverable
That image on an AFU device, keys in RAM	More is recoverable, but tool- and state-dependent
Recovering deleted files from unallocated space	Generally not possible under FBE — freed blocks are unreadable ciphertext
Bypassing a lock/FRP to access someone else's data	Out of scope — do not attempt on devices you don't own

Recoverable (with the right method and, usually, the credential or an AFU state): partitions, filesystem images, app data, media — as plaintext only once keys are available.

Not recoverable by physical readout alone: the plaintext of FBE-encrypted user data on a BFU device without the passcode; carved deletions from FBE unallocated space; anything gated by a hardware secure element that enforces attempt limits and throttling. No soldering technique changes this — the encryption is the barrier, not the interface.

Common misconceptions

"ISP works on any phone, UFS is just newer eMMC." No. UFS is a differential serial link with a PHY/transport stack, not a faster parallel bus. The eMMC ISP method has no direct UFS equivalent.
"There's a slow mode I can clock down to like eMMC 1-bit." No. UFS's lowest mode is still a trained differential link; there is no single-ended fallback.
"These UFS ISP test points let me tap the memory bus directly." Usually those points force the SoC into a download mode or are used for chip-level work — not an eMMC-style live tap of the UFS lanes.
"If I can dump the chip, I have the data." On FBE devices you have ciphertext. Readout ≠ decryption.
"Chip-off is a guaranteed fallback for UFS like it is for eMMC." It's a valid path, but harder: fewer readers, narrower model coverage, and the dump is still encrypted.
"EDL/Firehose will read any Qualcomm phone." You need a valid OEM-signed loader for that model, and modern devices lock EDL down. Availability, not capability, is often the blocker.

Sources

PhoneRepair.biz is a free community knowledge base. Data recovery and board-level repair carry a real risk of permanent data loss — when the data matters, back up any raw dump before modifying a device and consider a professional lab. Only work on devices you own or have documented authorization to service. See PhoneRepair:Legal notice.